1. Field of the Invention
The present invention relates to a flat panel display and a method of fabricating the same, and more particularly, to a rear light emitting type organic electroluminescent display with a black matrix and a method of fabricating the same.
2. Description of Related Art
FIG. 1A illustrates the cross sectional structure of a conventional organic electroluminescent display. FIG. 1B illustrates a plan view of a conventional organic electroluminescent display, wherein FIG. 1A is a cross sectional structure taken along the line I-I of FIG. 1B.
Referring to FIG. 1A, a transparent insulating substrate 10 on the upper part of which a buffer layer 15 is formed is divided into a first region 11 in which a pixel electrode is formed and a second region 12 in which a thin film transistor (TFT) and a capacitor are formed. A thin film transistor equipped with a semiconductor layer 20 in which source/drain regions 21, 22 are formed, a gate electrode 31 and source/drain electrodes 51, 52 respectively connected to the source/drain regions 21, 22 through contact holes 41, 42, is formed in the second region 12 of the insulating substrate 10. Furthermore, a capacitor, equipped with a first electrode 32 and a second electrode 53, is formed in the second region 12, and an insulating film, that is, a gate insulating film 30 and an interlayer insulating film 40 are formed between the conductive layers.
In the first region 11, one of the source/drain electrodes 51, 52 is connected to a pixel electrode 70 through a via hole 61 formed on a protection film 60 and acting as an anode electrode while a flattening film 80, equipped with an opening part 81 exposing a portion of the pixel electrode 70, is formed on the protection film 60 comprising the pixel electrode 70. An organic electroluminescent (EL) layer 90 is formed in the opening part 81, and a rear light emitting opaque electrode, namely, a cathode electrode 95, is formed on the organic EL layer 90.
Referring to FIG. 1B, the organic electroluminescent display is equipped with a plurality of signal lines, i.e., gate lines 35 used in selecting pixels and data lines 55 impressing data signals and power supply lines 56 providing a reference voltage required in driving a thin film transistor by impressing an equal common voltage to all pixels.
Pixels are respectively arranged per each pixel region limited by the signal lines 35, 55, 56, wherein each of the pixels comprises a plurality of thin film transistors connected to the signal lines, for example, two transistors, one capacitor and an organic electroluminescent display.
A flat panel display device, such as an active matrix organic light emitting device (AMOLED), comprises various wirings to impress a power supply to the switching device, wherein contrast of the flat panel display device is greatly reduced since an external light is reflected by a metallic material providing wirings. That is, there have been problems in that contrast is reduced since the external light is reflected by a gate electrode material acting as a lower electrode of the capacitor, and source/drain electrode materials comprising an upper electrode of the capacitor and a cathode material comprising a cathode, etc., as illustrated in FIG. 1A and FIG. 1B.
Although deterioration of contrast of a flat panel display device due to reflection of the external light has been conventionally prevented by attaching an expensive polarizer to the front surface of the flat panel display device, there have been other occurring problems that have arisen. Some of these problems are that manufacturing costs have increased according to use of the expensive polarizer and deterioration of luminescence of the flat panel display device since the polarizer itself blocks a portion of light emitted from an organic electroluminescent layer, thereby reducing transmittance of the light.
Furthermore, there have been problems in that although the signal lines should be formed so that two signal lines are electrically separated from each other on one layer, as illustrated in FIG. 1B, an inline short (59) is generated between lines each of which are adjacently arranged by conductive particles generated during processing, e.g., between the data lines (55) and the power supply lines (56), resulting in the formation of line defects.